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ASIC Verification Engineer


Job ID : 25688

Location : Santa Clara, CA

Company Name : QData

Job Type : contract

Industry : Information Technology

Salary : $55 - $60  per hour

No. of Positions : 1


Required Skills : ASIC Verification Engineer.

Benefits : None of These


Job Description :

Required Qualifications:

  • 4+ years’ experience required in verification.
  • System Verilog /UVM experience (Mandatory).
  • Good understanding of PCIe and Ethernet is needed.
  • Engineer must have good understanding of complete verification life cycle (test plan, test bench till coverage closure).
  • Define SoC verification strategy.
  • Good understanding of SoC life cycle.
  • Full chip testplan development.
  • Has participated in multiple SoC verification till tapeout stage.
  • Full chip TB Architecture definition.
  • Experience writing SoC testplans.
  • OVM based testbench development.
  • Experience in SoC Testbench definition.
  • SV functional coverage, Assertions coding.
  • Expertise & hands-on experience in OVM methodologies using SV.
  • Test case development, coding, execution, bug analysis.
  • Experience in developing TB components, including functional coverage implementation and assertion coding.
  • Regressions, coverage analysis.
  • Experience in Gate level simulation & netlist debugging.
  • Own/participate in verification closure.
  • Experience in Perl/Shell scripting.
  • Experience in PCIe, HBM memory protocol is preferred.

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